1. Technical Field
The present invention relates in general to data processing, and in particular, to input/output (I/O) operations in a data processing system. More particularly, the present invention relates to processing PCI Express atomic operations in a data processing system.
2. Description of the Related Art
Page migration is a supported function within the memory subsystem of conventional data processing systems. With these conventional data processing system architectures, specific rules/protocols are enforced whereby only certain types of input/output (I/O) operations are permitted to on the memory page being migrated during the actual migration, while other types of operations are not allowed to be completed. One example of the types of operations allowed to complete during a page migration is an Input/Output (I/O) direct memory access (DMA) operation. The methodology by which I/O DMA operations are permitted to continue executing on a page that is being migrated has been described in the art and involves specific protocols, which are also described in the art.
The rules related to I/O operations during page migration and the allowance of I/O DMA operations pursuant to these rules have been adopted within the Peripheral Component Interconnect (PCI) Express (PCIe) protocol by which code/logic of the PCIe Host Bridge (PHB) receives and schedules I/O operations from various connected I/O devices. Within the PCIe protocol, inbound posted memory writes are referred to as DMA Writes and are permitted to be completed while the target page is being migrated. Likewise, DMA Reads, which are a first type of inbound non-posted memory operations, are permitted during page migration. However, PCIe atomic operations, which are second type inbound non-posted operation, are not permitted to be executed during an ongoing page migration because they violate the existing migration rules.